The present invention relates to a semiconductor device comprising MOSFETs having respective gate insulating films with different thicknesses and to a method of manufacturing the same.
As higher-speed operations have been achieved in recent semiconductor integrated circuit devices, the thickness of the gate insulating film of a MOSFET has been reduced increasingly.
On the other hand, a lower driving voltage has been pursued for a logic circuit in a semiconductor integrated circuit with the view to lowering the power consumption of the semiconductor integrated circuit device. In the peripheral circuit of the logic circuit for performing input/output operations, however, it is necessary to drive a MOSFET with a voltage inputted from the outside. To hold its breakdown voltage high, therefore, a transistor provided in the peripheral circuit of the logic circuit uses a gate insulating film having a larger thickness than a transistor provided in the internal circuit of the logic circuit.
A description will be given to a method of manufacturing MOSFETs having respective gate insulating films with different thicknesses.
First, as shown in FIG. 10(a), isolation region 11 are formed in a semiconductor substrate 10 made of silicon, followed by a first silicon oxide film 12a with a thickness of, e.g., 4 nm formed over the entire surface of the semiconductor substrate 10 to serve as a gate insulating film. Thereafter, a resist pattern 13 is formed on the portion of the first silicon oxide film 12a corresponding to the peripheral circuit region of a logic circuit. Wet etching is then performed by using, e.g., hydrofluoric acid with respect to the first silicon oxide film 12a, thereby selectively removing the portion of the first silicon oxide film 12a corresponding to the internal circuit region of the logic circuit.
Next, as shown in FIG. 10(b), a second silicon oxide film 12b with a thickness of, e.g., 3 nm is formed over the entire surface of the semiconductor substrate 10.
Next, as shown in FIG. 10(c), a first gate insulating film 14A composed of the second silicon oxide film 12b and a first gate electrode 15A composed of a polysilicon film are formed in the internal circuit region of the logic circuit, while a second gate insulating film 14B composed of the first and second silicon oxide films 12a and 12b and a second gate electrode 15B composed of the polysilicon film are formed in the peripheral circuit region of the logic circuit.
Next, an impurity is implanted by using the first and second gate electrodes 15A and 15B as a mask to form lightly doped regions 16. Then, sidewalls 17 are formed on each of the first and second gate electrodes 15A and 15B. After that, an impurity is implanted by using, as a mask, the first and second gate electrodes 15A and 15B and the sidewalls to form heavily doped regions 18.
As a result, a first MOSFET including the first gate insulating film 14A composed of the second silicon oxide film 12b and having a thickness of 3 nm is obtained in the internal circuit region of the logic circuit, while a second MOSFET including the second gate insulating film 14B composed of the first and second silicon oxide films 12a and 12b and having a thickness of 7 nm is obtained in the peripheral circuit region of the logic circuit.
In accordance with the conventional method of manufacturing a semiconductor device, however, the second gate insulating film 14B obtained in the peripheral circuit of the logic circuit is formed in two separate steps, so that it is difficult for the second gate insulating film 14B to have a lifespan which is as long as the lifespan of a gate oxide film obtained in one oxidation step. This is because the second silicon oxide film 12b composing the second gate insulating film 14B is formed on the first silicon oxide film 12a after the resist pattern 13 is removed. Since the surface of the first silicon oxide film 12a has been contaminated or damaged in the step of removing the resist pattern 13, the reliability of the gate insulating film 14B is degraded.
In view of the foregoing, it is therefore an object of the present invention to improve the reliability of each of first and second gate insulating films having different thicknesses.
A first semiconductor device according to the present invention comprises a first MOSFET and a second MOSFET, the first MOSFET including: a first gate insulating film formed on a semiconductor substrate and having a relatively large thickness; and a first gate electrode composed of a polysilicon film formed on the first gate insulating film, the second MOSFET including: a second gate insulating film formed on the semiconductor substrate and having a relatively small thickness; and a second gate electrode composed of a metal film made of a refractory metal or a compound of a refractory metal and formed on the second gate insulating film.
In the first semiconductor device, the first gate insulating film of the first MOSFET has a relatively large thickness. Accordingly, the first MOSFET can be driven with a high voltage.
On the other hand, the second gate insulating film of the second MOSFET has a relatively small thickness. Accordingly, the second MOSFET can be driven with a low voltage so that power consumption is reduced. Since the second gate electrode is composed of the metal film made of a refractory metal or a compound of a refractory metal, the depletion of the second gate electrode can be prevented and the performance of the second MOSFET is improved.
With the first semiconductor device, therefore, the first MOSFET can be driven with a high voltage, while the second MOSFET can be driven with a low voltage and the depletion of the second gate electrode at the interface between itself and the gate insulating film is prevented. This increases the performance of the gate electrode and allows the formation of the two MOSFETs, of which different performances are required, on a single semiconductor substrate with high reliability.
In the first semiconductor device, the first MOSFET is preferably formed in a region of the semiconductor substrate corresponding to a peripheral circuit region of a logic circuit and the second MOSFET is preferably formed in a region of the semiconductor substrate corresponding to an internal circuit region of the logic circuit.
The arrangement enables driving with a high voltage which is required in the peripheral circuit of the logic circuit as well as driving with a low voltage which is required in the internal circuit of the logic circuit, while increasing the performance of the transistors.
In the first semiconductor device, the first MOSFET is preferably formed in a memory cell region of the semiconductor substrate and the second MOSFET is preferably formed in a logic circuit region of the semiconductor substrate.
The arrangement prevents a reduction in pause time (charge retention time of one memory cell) resulting from a leakage current, which is required in the memory cell, while increasing the performance of the MOSFETs, which is required in the logic circuit.
Preferably, the first semiconductor device further comprises a resistor composed of a polysilicon film formed in the step of forming the polysilicon film composing the first gate electrode. In the arrangement, a resistor can be provided without increasing the number of process steps.
In the first semiconductor device, the first gate insulating film is preferably composed of a silicon oxide film and the second gate insulating film is preferably composed of a silicon oxynitride film.
This further reduces the thickness of the second gate insulating film and increases the reliability thereof, thereby increasing the performance of the second MOSFET.
A second semiconductor device according to the present invention comprises a first MOSFET and a second MOSFET, the first MOSFET including: a first gate insulating film formed on a semiconductor substrate and having a relatively large thickness; and a first gate electrode composed of a multilayer structure formed on the first gate insulating film, the multilayer structure being composed of a lower-layer polysilicon film and an upper-layer metal film made of a refractory metal or a compound of a refractory metal, the second MOSFET including: a second gate insulating film formed on the semiconductor substrate and having a relatively small thickness; and a second gate electrode composed of a metal film made of a refractory metal or a compound of a refractory metal and formed on the second gate insulating film.
In the second semiconductor device, the first gate insulating film of the first MOSFET has a relatively large thickness and the first gate electrode is composed of the multilayer structure consisting of the polysilicon film and the metal film. Accordingly, the gate electrode can be reduced in resistance and increased in breakdown voltage.
Since the second gate insulating film of the second MOSFET has a relatively small thickness, it can be driven with a low voltage so that power consumption is reduced. Since the second gate electrode is composed of the metal film made of a refractory metal or a compound of a refractory metal, the depletion of the second gate electrode can be prevented and the performance of the second MOSFET is improved.
With the second semiconductor device, therefore, the gate electrode of the first MOSFET can be reduced in resistance and increased in breakdown voltage, while the second MOSFET can be driven with a low voltage and the depletion of the second gate electrode at the interface between itself and the gate insulating film is prevented. This increases the performance of the gate electrode and allows the formation of the two MOSFETs, of which different performances are required, on a single semiconductor substrate with high reliability.
In the second semiconductor device, the first MOSFET is preferably formed in a memory cell region of the semiconductor substrate and the second MOSFET is preferably formed in a logic circuit region of the semiconductor substrate.
In the arrangement, the gate electrode can be reduced in resistance and increased in breakdown voltage in the memory cell region, while the transistor can be increased in performance in the logic circuit.
A first method of manufacturing a semiconductor device according to the present invention comprises: a first film forming step of successively forming, on a semiconductor substrate, a first insulating film having a relatively large thickness and a polysilicon film; a patterning step of patterning the polysilicon film and the first insulating film to form a first gate insulating film of a first MOSFET and a dummy gate insulating film, each being composed of the first insulating film, and to form a first gate electrode of the first MOSFET and a dummy gate electrode, each being composed of the polysilicon film; a sidewall forming step of forming sidewalls on each of the first gate electrode and the dummy gate electrode; an insulating film removing step of depositing an interlayer insulating film over the entire surface of the semiconductor substrate, removing the portions of the interlayer insulating film overlying the first gate electrode and the dummy gate electrode, and thereby exposing the first gate electrode and the dummy gate electrode; an etching step of forming, on the interlayer insulating film, a mask pattern covering the first gate electrode and exposing the dummy gate electrode, performing etching by using the mask pattern to remove the dummy gate electrode and the dummy gate insulating film, and thereby forming a depressed portion internally of the sidewalls of the dummy gate electrode; a second film forming step of successively forming, over the entire surface of the semiconductor substrate, a second insulating film having a relative small thickness and a metal film made of a refractory metal or a compound of a refractory metal such that the depressed portion is filled therewith; and a film removing step of removing the mask pattern and the portions of the second insulating film and the metal film located externally of the depressed portion and thereby forming a second gate insulating film of a second MOSFET composed of the second insulating film and a second gate electrode of the second MOSFET composed of the metal film.
In accordance with the first method of manufacturing a semiconductor device, the polysilicon film and the first insulating film having a relatively large thickness are patterned to form the first gate insulating film of the first MOSFET composed of the first insulating film and the first gate electrode of the first MOSFET composed of the polysilicon film. Accordingly, there can be formed the first MOSFET having the first gate insulating film with a relatively large thickness and the second gate electrode composed of the polysilicon film.
On the other hand, the second insulating film having a relatively small thickness and the metal film are filled in the depressed portion formed as a result of removing the dummy gate electrode and the dummy gate insulating film to form the second gate insulating film of the second MOSFET composed of the second insulating film and the second gate electrode of the second MOSFET composed of the metal film. Accordingly, there can be formed the second MOSFET having the second insulating film with a relatively small thickness and the second gate electrode composed of the metal film.
In accordance with the first method of manufacturing a semiconductor device, therefore, the first MOSFET having the first gate insulating film with a relatively large thickness, the first gate electrode composed of the polysilicon film, the second MOSFET having the second gate insulating film with a relatively small thickness, and the second gate electrode composed of the metal film can be formed on a single semiconductor substrate. This ensures the formation of the two MOSFETs, of which different performances are required, on a single semiconductor substrate with high reliability.
Since the first gate insulating film of the first MOSFET is formed by patterning the first insulating film formed in one step, the reliability thereof is improved compared with a conventional gate insulating film formed in two steps.
In the first method of manufacturing a semiconductor device, the patterning step preferably includes the step of forming the first gate insulating film and the first gate electrode on a region of the semiconductor substrate corresponding to a peripheral circuit region of a logic circuit and forming the dummy insulating film and the dummy gate electrode on a region of the semiconductor substrate corresponding to an internal circuit region of the logic circuit.
This allows the formation the first MOSFET which can be driven with a high voltage in the peripheral circuit of the logic circuit and the formation of the higher-performance second MOSFET which can be driven with a low voltage in the internal circuit of the logic circuit.
In the first method of manufacturing a semiconductor device, the patterning step preferably includes the step of forming the first gate insulating film and the first gate electrode on a memory cell region of the semiconductor substrate and forming the dummy insulating film and the dummy gate electrode on a logic circuit region of the semiconductor substrate.
In the arrangement, the first MOSFET capable of preventing a reduction in pause time resulting from a leakage current can be formed in the memory cell region and the high-performance second MOSFET can be formed in the logic circuit.
In the first method of manufacturing a semiconductor device, the patterning step preferably includes the step of patterning the polysilicon film and the first insulating film to form a resistor insulating film composed of the first insulating film and a resistor composed of the polysilicon film.
This allows the formation of a resistor without increasing the number of process steps.
In the first method of manufacturing a semiconductor device, the first film forming step preferably includes the step of forming a silicon oxide film as the first insulating film and the second film forming step preferably includes the step of forming a silicon oxynitride film as the second insulating film.
This further reduces the thickness of the second insulating film and increases the reliability thereof, thereby further increasing the performance of the second MOSFET.
In the first method of manufacturing a semiconductor device, the etching step preferably includes the step of removing the dummy gate electrode and the dummy gate insulating film by wet etching.
This prevents the region of the semiconductor substrate, which is to serve as the channel, from being damaged.
A second method of manufacturing a semiconductor device according to the present invention comprises: a first film forming step of successively forming, on a semiconductor substrate, a first insulating film having a relatively large thickness and a polysilicon film; a first patterning step of patterning the polysilicon film and the first insulating film to form a first-layer gate insulating film of a flash memory and a dummy gate insulating film, each being composed of the first insulating film, and to form a floating gate electrode of the flash memory and a dummy gate electrode, each being composed of the polysilicon film; a sidewall forming step of forming sidewalls on each of the floating gate electrode and the dummy gate electrode; an insulating film removing step of depositing an interlayer insulating film over the entire surface of the semiconductor substrate, removing the portions of the interlayer insulating film overlying the floating gate electrode and the dummy gate electrode, and thereby exposing the floating gate electrode and the dummy gate electrode; an etching step of forming, on the interlayer insulating film, a second insulating film covering the floating gate electrode and exposing the dummy gate electrode, performing etching by using the insulating film to remove the dummy gate electrode and the dummy gate insulating film, and thereby forming a depressed portion internally of the sidewalls of the dummy gate electrode; a second film forming step of successively forming, over the entire surface of the semiconductor substrate, a third insulating film having a relatively small thickness and a metal film made of a refractory metal or a compound of a refractory metal such that the depressed portion is filled therewith; and a second patterning step of patterning the second insulating film, the third insulating film, and the metal film to form a second-layer gate insulating film of the flash memory composed of the second and third insulating films, a gate insulating film of a MOSFET composed of the third insulating film, a control electrode of the flash memory composed of the metal film, and a gate electrode of the MOSFET composed of the metal film.
In accordance with the second method of manufacturing a semiconductor device, the first insulating film having a relatively large thickness is patterned in the first patterning step to form the first-layer gate insulating film of the flash memory and the second and third insulating films are patterned in the second patterning step to form the second-layer gate insulating film of the flash memory. Briefly, the first-layer and second-layer gate insulating films have sufficiently large thicknesses, so that the reliability of the flash memory is improved.
On the other hand, the third insulating film with a relatively small thickness and the metal film are filled in the depressed portion formed as a result of removing the dummy gate electrode and the dummy gate insulating film to form the insulating film of the MOSFET composed of the third insulating film and the gate electrode of the MOSFET composed of the metal film. Accordingly, there can be formed the MOSFET having the gate insulating film with a relatively small thickness and the gate electrode composed of the metal film.
Since the second method of manufacturing a semiconductor device allows the formation of the flash memory having the first-layer gate insulating film with a large thickness and the second-layer gate insulating film composed of the multilayer structure consisting of the second and third insulating films, the reliability of the flash memory is improved.
Since the second method of manufacturing a semiconductor device also allows the formation of the MOSFET having the gate insulating film with a relatively small thickness and the gate electrode composed of the metal film, the performance of the MOSFET can be improved. Since the gate insulating film of the MOSFET is formed by patterning the first insulating film formed in one step, the reliability thereof is improved compared with a conventional gate insulating film formed in two steps.
In the second method of manufacturing a semiconductor device, the etching step preferably includes the step of removing the dummy gate electrode and the dummy gate insulating film by wet etching.
This prevents the region of the semiconductor substrate, which is to serve as the channel, from being damaged.
In the second method of manufacturing a semiconductor device, the first patterning step preferably includes the step of patterning the polysilicon film and the first insulating film to form a capacitor insulating film composed of the first insulating film and a capacitor lower electrode composed of the polysilicon film and the second patterning step preferably includes the step of patterning the second insulating film, the third insulating film, and the metal film to form a capacitor insulating film composed of the second and third insulating films and a capacitor upper electrode composed of the metal film.
This allows the formation of a capacitor with high reliability without increasing the number of process steps.